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IPC-4556 (PDF) Single User
Specification for Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) Plating for Printed Circuit Boards
Englisch, Stand: Januar 2013, 82 Seiten. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
This specification sets the requirements for the use of electroless nickel/electroless palladium/immersion gold (ENEPIG) as a surface finish for printed boards. It establishes requirements for ENEPIG deposit thicknesses for applications including soldering, wire bonding and as a contact finish. It is intended for use by chemical suppliers, printed board manufacturers, electronics manufacturing services (EMS) providers and original equipment manufacturers (OEMs). ENEPIG is a tertiary layered surface finish plated over copper as the basis metal. ENEPIG is a multifunctional surface finish, applicable to soldering and to gold, aluminum and copper wire bonding. It is also suitable as the mating surface for soft membrane and steel dome contacts. Additional applications include use in low insertion force (LIF) and zero insertion force (ZIF) edge connectors and for press-fit applications. The electroless palladium layer forms a diffusion barrier that impedes nickel diffusion to the gold surface and, in turn, the immersion gold protects the palladium layer from reacting with contaminants prior to processing that might otherwise affect joining processes, such as wire bonding and soldering.
IPC-4556 AM1 (Hardcopy)
Specification for Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) Plating for Printed Circuit Boards
Englisch, Stand: 2016, 8 Seiten
This specification sets the requirements for the use of electroless nickel/electroless palladium/immersion gold (ENEPIG) as a surface finish for printed boards. It establishes requirements for ENEPIG deposit thicknesses for applications including soldering, wire bonding and as a contact finish. It is intended for use by chemical suppliers, printed board manufacturers, electronics manufacturing services (EMS) providers and original equipment manufacturers (OEMs). ENEPIG is a tertiary layered surface finish plated over copper as the basis metal. ENEPIG is a multifunctional surface finish, applicable to soldering and to gold, aluminum and copper wire bonding. It is also suitable as the mating surface for soft membrane and steel dome contacts. Additional applications include use in low insertion force (LIF) and zero insertion force (ZIF) edge connectors and for press-fit applications. The electroless palladium layer forms a diffusion barrier that impedes nickel diffusion to the gold surface and, in turn, the immersion gold protects the palladium layer from reacting with contaminants prior to processing that might otherwise affect joining processes, such as wire bonding and soldering.
IPC-4556 AM1 (PDF) Single User
Specification for Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) Plating for Printed Circuit Boards
Englisch, Stand: 2016, 8 Seiten. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
The Amendment 1 to IPC-4556 made the following changes to the base specification: a) It added the absolute value of the maximum thickness for the immersion gold of 0.070 μm [2.8 μin] that accompanies the statistically valid minimum immersion gold thickness; b) It added two more photomicrograph images to provide better information on identifying nickel hyper corrosion; c) It added the basis of determining both the minimum as well as maximum values of immersion gold thickness with ENEPIG surface finish; d) It added the statement that using statistical process control is encouraged but not mandatory with this surface finish; e) It provided two alternate methods for deposition of thicker gold compared to strictly immersion gold; and f) It better defines how the C=0 sampling plan is to be utilized such that it will conform to this surface finishes' requirements.
IPC-4562A WAM1 (Hardcopy)
Metal Foil for Printed Board Applications
Englisch. Stand: Mai 2008; 27 Seiten
This specification covers metal foils supported by carrier films and unsupported foils suitable for subsequent use in only printed boards and addresses the requirements for procurement of these same metal foils. Unless otherwise agreed upon between u ser and supplier (AABUS), metal foils shall be considered acceptable as long as the requirements in this specification are met.
Included in the IPC-C-102, IPC-C-105, IPC-C-107 and the IPC-C-1000 Collections.
IPC-4562A-WAM1 (PDF) Single User
Metal Foil for Printed Wiring Applications
Englisch. Stand: Mai 2008, 27 Seiten. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
This specification covers metal foils supported by carrier films and unsupported foils suitable for subsequent use in only printed boards and addresses the requirements for procurement of these same metal foils. Unless otherwise agreed upon between u ser and supplier (AABUS), metal foils shall be considered acceptable as long as the requirements in this specification are met.
Included in the IPC-C-102, IPC-C-105, IPC-C-107 and the IPC-C-1000 Collections.
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IPC-4761 (Hardcopy)
Design Guide for Protection of Printed Board Via Structures
Englisch, 16 Seiten. Stand: Juli 2006
IPC-4761 is the sole industry guideline providing PCB designers, manufacturers and uses with detailed information on all existing methods for protecting vias on printed boards, including all types of via tenting, plugging, filling and capping. Production issues, long term reliability concerns and material specification and selection are provided to aid in evaluating the benefits and concerns for employing each type of via protection.
IPC-4761 (PDF) Single User
Design Guide for Protection of Printed Board Via Structures
Englisch, 16 Seiten. Released Juli 2006. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
IPC-4761: Designrichtlinie für den Schutz von Vias in Leiterplatten
IPC-4761 'Design Guide for Protection of Printed Board Via Structures' erschien im Juli 2006 und umfasst 16 Seiten. Die Richtlinie ist das einzige Industriedokument, welches den De signern, Leiterplattenherstellern und -anwendern detaillierte Informationen über sämtliche existierende Methoden des Via-Schutzes in Leiterplatten informiert. Dazu zählen Tenting (Abdeckung), Plugging (Verfüllen), Filling (Füllen) und Capping (Verdec ken). Um die jeweils am besten geeignete Technik unter Kenntnis ihrer Vorzüge sowie Nachteile auswählen zu können, gibt die Richtlinie Hiweise zur technologischen Realisierung, zur Langzeitzuverlässigkeit, Materialspezifikation sowie Selektion.
IP C-4761 is the sole industry guideline providing PCB designers, manufacturers and uses with detailed information on all existing methods for protecting vias on printed boards, including all types of via tenting, plugging, filling and capping. Producti on issues, long term reliability concerns and material specification and selection are provided to aid in evaluating the benefits and concerns for employing each type of via protection. 16 pages. Released July 2006.
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IPC-4781 (PDF) Single User
Qualification and Performance Specification of Permanent, Semi-Permanent and Temporary Legend and/or Marking Ink
Englisch. Stand: Mai 2008, 17 Seiten. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
The industry's first specification for the evaluation of a legend and/or marking ink material for the determination of acceptability of use in a standard printed board system. IPC-4781 provides coverage for adhesion, material qualification and testin g, resistances to solvents, requirements for resistance to lead-free solders, and electrical requirements.
Included in the IPC-C-105 and the IPC-C-1000 Collections.
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IPC-4811 (PDF) Single User
Specification for Embedded Passive Device Resistor Materials for Rigid and Multilayer Printed Boards
Englisch. Stand: Mai 2008, 26 Seiten. Keine Druckberechtigung, DRM-geschützt, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
This document describes materials that can be used for the fabrication of embedded passive resistor devices within the finished printed circuit board substrate. It provides information on general designations and associated characteristics of embedde d passive device (EPD) resistor materials. The document shall be used as a qualification and conformance standard for designers and users when designing or constructing printed circuit boards containing these EPD materials. This document contains mat erial designation, conformance (requirements), qualification (characterization) and quality assurance specifications. This document should be used in conjunction with both the IPC-2200 series design and the IPC-6010 series qualification and performan ce standards.
Included in the IPC-C-105, IPC-C-107 and the IPC-C-1000 Collections.
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IPC-4821 (PDF) Single User
Specification for Embedded Passive Device Capacitor Materials for Rigid and Multilayer Printed Boards
Englisch. 34 pages. Released May 2006. Keine Druckberechtigung, DRM-Schutz, !!!ACHTUNG!!! NENNEN SIE BEI DER BESTELLUNG DEN USER (NAME+E-MAIL)
This document describes materials that can be used for the fabrication of embedded passive capacitor devices within the finished printed circuit board substrate. For this document, embedded passive devices and the phrase embedded passives are conside red to be equivalent. It provides information on general designations and associated characteristics of embedded passive device (EPD) capacitor materials. The document shall be used as a qualification and conformance standard for these materials. Thi s document contains material designation, conformance (requirements), qualification (characterization) and quality assurance specifications. This document covers the requirements for dielectric, conductive, and insulating materials that are used with materials for the manufacture of printed circuit boards containing embedded passive capacitor functionality.
